DESIGN AND IMPLEMENTATION OF A REAL-TIME HIERARCHICAL PARALLEL POSTPROCESSOR FOR 100 KEV ELECTRON-BEAM LITHOGRAPHY

Authors
MURAY LP ANDERSON EH BOEGLI V
Citation
Lp. Muray et al., DESIGN AND IMPLEMENTATION OF A REAL-TIME HIERARCHICAL PARALLEL POSTPROCESSOR FOR 100 KEV ELECTRON-BEAM LITHOGRAPHY, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 15(6), 1997, pp. 2204-2208
Citations number
4
Journal title
Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena → ACNP
ISSN journal
10711023
Volume
15
Issue
6
Year of publication
1997
Pages
2204 - 2208
Database
ISI
SICI code
1071-1023(1997)15:6<2204:DAIOAR>2.0.ZU;2-6
Abstract
A farm of off-the-shelf microprocessors is evaluated for use as a real -time parallel postprocessing subsystem of the Lawrence Berkeley Natio nal Laboratory datapath, including backscatter proximity correction. T he native data format is GDSII with embedded control. Data storage is fully hierarchical with no intermediate binary pattern data formats. B enchmarks of a four Pentium pro(TM) farm, after optimization, demonstr ate compatibility with exposure rates of 25 MHz for 32% area fill on a vector scan Gaussian beam e-beam tool. Scalability of the architectur e is discussed in detail. (C) 1997 American Vacuum Society.