SCALING TRENDS FOR DEVICE PERFORMANCE AND RELIABILITY IN CHANNEL-ENGINEERED N-MOSFETS

Channel-engineered MOSFET's with retrograde doping profiles are expect ed to provide increased carrier mobility and immunity to short channel effects, However, the physical mechanisms responsible for device perf ormance of retrograde designs in the deep-submicron regime are not ful ly understood, and general device scaling trends are not well document ed, Also, Little effort has been devoted to the study of hot-electron- induced device; degradation. In this paper, we employ a comprehensive simulation methodology to investigate scaling and device performance t rends in channel-engineered n-MOSFET's. The method features an advance d ensemble Monte Carlo device simulator to extract hot-carrier reliabi lity for super-steep-retrograde and more conventional silicon n-MOS de signs with effective channel lengths scaled from 800 to 100 nn, With d ecreasing channel length, our simulations indicate that the retrograde design shows increasingly less total hot-electron injection into the oxide than the conventional design. However, near the 100-nm regime, t he retrograde design provides less current drive, loses its advantage of higher carrier mobility, and exhibits much greater sensitivity to h ot-electron-induced interface states when compared to the conventional device.