CORRELATION BETWEEN HOT-CARRIER-INDUCED INTERFACE STATES AND GIDL CURRENT INCREASE IN N-MOSFETS

Correlation between created interface states and GIDL current increase in n-MOSFET's during hot-carrier stress is quantitatively discussed, A trap-assisted two-step tunneling model is used to relate the increas ed interface-state density Delta D-it) with the shift in GIDL current (Delta I-d). Results show that under appropriate drain-gate biases, th e two-step tunneling Is so dominant that Delta I-d is insensitive to t emperatures up to about 50 degrees C. With the help of 2-D device simu lation, the locations of the drain region with significant two-step tu nneling and the energy levels of the traps involved can be found, with both depending on the drain voltage. From these insights on Delta D-i t Delta I-d and their relation, Delta D-it near the midgap can be esti mated, with an error less than 10% as compared to the results of charg e-pumping measurement on the same transistors, Devices with nitrided g ate oxide, different gate-oxide thicknesses and different channel dime nsions are also tested to verify the above correlation.