INFLUENCE OF ASYMMETRIC SYMMETRIC SOURCE/DRAIN REGION ON ASYMMETRY AND MISMATCH OF CMOSFETS AND CIRCUIT PERFORMANCE/

Experimental results on asymmetry and mismatch (A&M) characteristics a re discussed for 0.5-mu m surface-channel n-MOSFET's and buried-channe l p-MOSFET's fabricated with four ion-implantation methods and designe d with a conventional and a side-by-side layout. The side-by-side layo ut is useful to improve A&M caused by source/drain asymmetry in MOSFET 's with a one-sided 7 degrees-implantation method, The symmetric 7 deg rees x 4-implantation method gives good A&M characteristics of n- and p-MOSFET's with the both layouts, According to the circuit performance of ring oscillators, the ion-implantation method is correlated to sup ply-current/oscillation-frequency/delay-power product and substrate cu rrent. The symmetric 7 degrees x 4-implantation method is the most pre ferable in terms of A&M and punchthrough immunity of CMOSFET as well a s circuit performance.