A CORDIC PROCESSOR FOR FFT COMPUTATION AND ITS IMPLEMENTATION USING GALLIUM-ARSENIDE TECHNOLOGY

In this paper, the architecture and the implementation of a complex fa st Fourier transform (CFFT) processor using 0.6 mu m gallium arsenide (GaAs) technology are presented, This processor computes a 1024-point FFT of 16 bit complex data in less than 8 mu s, working at a frequency beyond 700 MHz, with a power consumption of 12.5 W, The architecture of the processor is based on the COordinate Rotation DIgital Computer (CORDIC) algorithm, which avoids the use of conventional multiplicatio n-and-accumulation (MAC) units, but evaluates the trigonometric functi ons using only add and shift operations, Improvements to the basic COR DIC architecture are introduced in order to reduce the area and power of the processor, This together with the use of pipelining and carry s ave adders produces a very regular and fast processor, The CORDIC unit s were fabricated and tested in order to anticipate the final performa nce of the processor, This work also demonstrates the maturity of GaAs technology for implementing ultrahigh-performance signal processors.