OVERVIEW OF COMPLEMENTARY GAAS TECHNOLOGY FOR HIGH-SPEED VLSI CIRCUITS

Citation
Rb. Brown et al., OVERVIEW OF COMPLEMENTARY GAAS TECHNOLOGY FOR HIGH-SPEED VLSI CIRCUITS, IEEE transactions on very large scale integration (VLSI) systems, 6(1), 1998, pp. 47-51
Citations number
15
Categorie Soggetti
Computer Science Hardware & Architecture","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
ISSN journal
10638210
Volume
6
Issue
1
Year of publication
1998
Pages
47 - 51
Database
ISI
SICI code
1063-8210(1998)6:1<47:OOCGTF>2.0.ZU;2-I
Abstract
A self-aligned complementary GaAs (CGaAs) technology (developed at Mot orola) for low-power, portable, digital and mixed-mode circuits is bei ng extended to address high-speed VLSI circuit applications, The proce ss supports full complementary, unipolar (pseudo-DCFL), source-coupled , and dynamic (domino) logic families, Though this technology is not y et mature, it is years ahead of CMOS in terms of fast gate delays at l ow power supply voltages. Complementary circuits operating at 0.9V hav e demonstrated power-delay products of 0.01 mu W/MHz/gate. Propagation delays of unipolar circuits are as low as 25 ps. Logic families can b e mixed on a chip to trade power for delay, CGaAs is being evaluated f or VLSI applications through the design of a PowerPC-architecture micr oprocessor.