A NEW ON-CHIP DIGITAL BIST FOR ANALOG-TO-DIGITAL CONVERTERS

Citation
M. Ehsanian et al., A NEW ON-CHIP DIGITAL BIST FOR ANALOG-TO-DIGITAL CONVERTERS, Microelectronics and reliability, 38(3), 1998, pp. 409-420
Citations number
22
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
00262714
Volume
38
Issue
3
Year of publication
1998
Pages
409 - 420
Database
ISI
SICI code
0026-2714(1998)38:3<409:ANODBF>2.0.ZU;2-T
Abstract
A fully digital built-in self-test (BIST) for analog-to-digital conver ters is presented in this paper. This test circuit is capable of measu ring the DNL, INL, offset error and gain error, and mainly consists of several registers and some digital subtracters. The main advantage of this BIST is the ability to test DNL and INL for all codes in the dig ital domain, which in turn eliminates the necessity of calibration. On the other hand, some parts of the analog-to-digital converter with mi nor modifications are used in the BIST simultaneously. This also reduc es the area overhead and the cost of the test. The proposed BIST struc ture presents a compromise between test accuracy, area overhead and te st cost. The BIST circuitry has been designed using Mitel CMOS 1.5 mu m technology. The simulation results of the test show that it can be a pplied to medium resolution analog-to-digital converters or high resol ution pipelined analog-to-digital converters. The presented BIST shows satisfactory results for a nine-bit pipelined analog-to-digital conve rter. (C) 1998 Elsevier Science Ltd. All rights reserved.