MASK PATTERNING CHALLENGES FOR DEVICE FABRICATION BELOW 100 NM

Mask pattern generation, pattern transfer processes, and inspection an d repair will be critical factors influencing progress in nanolithogra phy. By identifying the lithography trends driving mask-patterning iss ues, it is possible to define the future challenges the technology wil l be facing to enable semiconductor device fabrication at and below th e 100 nm device generation. This paper offers a roadmap of potential s olutions that would enable advanced mask technology. It also identifie s several topics accessible to universities and other organizations fo cused on precompetitive research, which are complementary to the aims of industrial development of semiconductor technology.