GATE ENGINEERING FOR DEEP-SUBMICRON CMOS TRANSISTORS

Gate depletion and boron penetration through thin gate oxide place dir ectly opposing requirements on the gate engineering for advanced MOSFE T's, In this paper, several important issues of deep-submicron CMOS tr ansistor gate engineering are discussed. First, the impact of gate nit rogen implantation on the performance and reliability of deep submicro n CMOSFET's is investigated, The suppression of boron penetration is c onfirmed by the SIMS profiles, and is attributed mainly to the diffusi on retardation effect in bulk polysilicon by the presence of nitrogen. The MOSFET I-V characteristics, MOS capacitor quasi-static C-V curves , SIMS profiles, gate sheet resistance, and oxide Q(bd) are compared f or different nitrogen implant conditions, A nitrogen dose of 5 x 10(15 ) cm(-2) is found to be the optimum choice at an implant energy of 40 KeV in terms of the overall electrical behavior of CMOSFET's, Under op timum design, gate nitrogen implantation is found to be effective in e liminating boron penetration without degrading performance of either p (+) gate p-MOSFET and n(+) gate n-MOSFET. Secondly, the impact of gate microstructure on the performance of deep-submicron CMOSFET's is disc ussed by comparing poly and amorphous silicon gate deposition technolo gies, Thirdly, poly-Si1-xGex is presented as a superior alternative ga te material. Higher dopant activation efficiently results in higher ac tive dopant concentration near the gate/SiO2 interface without increas ing the gross dopant concentration. This plus the lower annealing temp erature suppress the dopant penetration. Phosphorus-implanted poly-Sio (0.8)Ge(0.2) gate is compared with polysilicon gate in this study.