A LOW THERMAL BUDGET SELF-ALIGNED TI SILICIDE TECHNOLOGY USING GERMANIUM IMPLANTATION FOR THIN-FILM SOI MOSFETS

In this paper, a titanium salicide technology with a very low thermal annealing temperature using germanium implantation for thin film SOI M OSFET's is investigated in detail. Ti silicide formation on the amorph ous silicon generated by germanium implantation is studied. Compared t o the conventional Ti salicide process, the Ti silicidation temperatur e is significantly lowered and the silicide depth is well controlled t hrough the pre-amorphized layer, Therefore, the potential problems of the salicide process for SOI MOSFET's such as lateral voids, dopant se gregation, thermal agglomeration, and increase of resistance on narrow gate are suppressed by germanium implantation. With the Ge pre-amorph ization salicide process, a very low silicide contact resistance is ob tained and sub-0.25-mu m SOI MOSFET's are fabricated with good device characteristics.