Dm. Lewis et al., THE TRANSMOGRIFIER-2 - A 1 MILLION GATE RAPID-PROTOTYPING SYSTEM, IEEE transactions on very large scale integration (VLSI) systems, 6(2), 1998, pp. 188-198
This paper describes the Transmogrifier-2 (TM-2), a second-generation
multifield programmable gate array (FPGA) rapid-prototyping system. Th
e largest version of the system will comprise 16 boards that each cont
ain two Altera 10K50 FPGA's, four I-Cube interconnect chips, and up to
8 Mbytes of memory. The inter-FPGA routing architecture of the TM-2 u
ses a novel interconnect structure, a nonuniform partial crossbar, tha
t provides a constant delay between any two FPGA's in the system. The
TM-2 architecture is modular and scalable, meaning that systems of var
ious sizes can be constructed from copies of the same board, while mai
ntaining routability and the constant delay feature. Other features in
clude a system-level programmable clock that allows single-cycle acces
s to off-chip memory, and programmable clock waveforms with edge resol
ution of 10 ns. The first Transmogrifier-2 boards have been manufactur
ed and are functional. They have recently been used successfully in so
me simple graphics acceleration applications.