ZERO-ALIASING SPACE COMPACTION OF TEST RESPONSES USING MULTIPLE PARITY SIGNATURES

Citation
K. Chakrabarty et Jp. Hayes, ZERO-ALIASING SPACE COMPACTION OF TEST RESPONSES USING MULTIPLE PARITY SIGNATURES, IEEE transactions on very large scale integration (VLSI) systems, 6(2), 1998, pp. 309-313
Citations number
10
Categorie Soggetti
Computer Science Hardware & Architecture","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
ISSN journal
10638210
Volume
6
Issue
2
Year of publication
1998
Pages
309 - 313
Database
ISI
SICI code
1063-8210(1998)6:2<309:ZSCOTR>2.0.ZU;2-I
Abstract
We present a parity-based space compaction technique that eliminates a liasing for any given fault model. The test responses from a circuit u nder test with a large number of primary outputs are merged into a nar row signature stream using a multiple-output parity tree. The function s realized by the different outputs of the compactor are determined by a procedure that targets the desired fault model, Experimental result s for the ISCAS-85 benchmarks show that zero aliasing of single stuck- line faults can be achieved with a two-output parity tree compactor. O ur findings corroborate recent results on the fundamental limits of sp ace compaction.