The design and VLSI implementation of a new stochastic D/A converter u
sing the properties of Cellular Automata (CA) is presented in this pap
er. The converter is implemented using a Double Layer Metal (DLM), 0.7
mu m, N-well, CMOS technology process provided by the European Silico
n Structures (ES2). Its maximum conversion rate is 6 kHz and it is int
ended ro be used in low-cost applications. Additionally, the proposed
approach integrates into digital techniques more easily than other pop
ular building D/A techniques.