SELF-ORGANIZING NETWORK FOR FEATURE-MAP FORMATION - ANALOG INTEGRATED-CIRCUIT ROBUST TO DEVICE AND CIRCUIT MISMATCH

Citation
H. Yonezu et al., SELF-ORGANIZING NETWORK FOR FEATURE-MAP FORMATION - ANALOG INTEGRATED-CIRCUIT ROBUST TO DEVICE AND CIRCUIT MISMATCH, Computers & electrical engineering, 24(1-2), 1998, pp. 63-73
Citations number
9
Categorie Soggetti
Computer Science Interdisciplinary Applications","Computer Science Hardware & Architecture","Computer Science Interdisciplinary Applications","Engineering, Eletrical & Electronic
ISSN journal
00457906
Volume
24
Issue
1-2
Year of publication
1998
Pages
63 - 73
Database
ISI
SICI code
0045-7906(1998)24:1-2<63:SNFFF->2.0.ZU;2-V
Abstract
A network model self-organizing a feature map was proposed and investi gated in computer simulations as well as experiments. The network was quite effective for self-organizing a feature map, in which winner gro ups are formed with redundant neurons. Fundamental circuits for the se lf-organizing network were developed. The experimental results were in good agreement with results of SPICE simulation. It was verified in a primitive network that feature maps were self-organized with high pro bability for 9 input patterns. It was clarified that redundant neurons forming a winner group are a key for solving a problem of wrong opera tion in analog circuits caused by the device and circuit mismatch. (C) 1998 Elsevier Science Ltd. All rights reserved.