ELECTRICAL CHARACTERIZATION AND ANNEALING BEHAVIOR OF DEFECT INTRODUCED IN SI DURING SPUTTER ETCHING IN AN AR PLASMA

We have employed current-voltage and capacitance-voltage measurements in conjunction with deep level transient spectroscopy to characterize the defects induced in n-Si during rf sputter etching in an Ar plasma. The reverse current, at a bias of 1 V, of the Schottky barrier diodes fabricated on the etched samples decreased nonmonotonically with etch time to a minimum at 6 min and, thereafter, increased. The reverse cu rrent also increased with decreasing plasma pressure. The barrier heig hts of the diodes followed the opposite trend. Six prominent electron traps were introduced in the substrate during Ar sputter etching. A co mparison with the defects induced during high-energy alpha-particle an d electron irradiation of the same material revealed that sputter etch ing created the VO and VP centers and V-2(-/0). The V-2(=/-) charge st ate of the divacancy was not detected in our plasma etched samples. We have attributed the nondetection of V-2(=/-) to the presence of defec t-induced stress fields in the etched samples. A secondary defect with an energy level at E-c - 0.219 eV was introduced during annealing and was found to be stable at 650 degrees C. This defect was introduced a t the expense of a sputter-etching induced defect P4, which has simila r electronic and annealing properties as EAr201 (E-c - 0.201 eV), crea ted in Ar-ion bombarded n-type Si. (C) 1998 American Vacuum Society.