I. Pomeranz et Sm. Reddy, ON METHODS TO MATCH A TEST PATTERN GENERATOR TO A CIRCUIT-UNDER-TEST, IEEE transactions on very large scale integration (VLSI) systems, 6(3), 1998, pp. 432-444
Autonomous circuits such as linear feedback shift registers (LFSR's) a
nd cellular automata are used as low-cost test pattern generators for
circuits testable by pseudo-random patterns. We demonstrate that diffe
rent LFSR's of the same degree, started from different initial states,
may yield significantly different fault coverages and test lengths wh
en used as test pattern generators for a given circuit, especially whe
n the circuit has faults which are hard to detect by a practical numbe
r of pseudo-random patterns. Methods to tailor an LFSR to a circuit-un
der-test are proposed, that attempt to select the most effective LFSR
and initial state for the circuit. The first method is based on a lear
ning process that can be applied directly to certain types of circuits
. The learning process is also used to establish a collection of (prim
itive and nonprimitive) LFSR's and initial states, effective for arbit
rary circuits. This collection can then be used as a starting point fo
r a genetic optimization procedure aimed at improving the selected LFS
R and initial state. The use of an LFSR that can apply complemented as
well as uncomplemented test patterns is shown to significantly improv
e the fault coverage, at the cost of a small area overhead. Experiment
al results demonstrate the applicability of the proposed approaches to
stuck-at faults and to transition faults.