AUTOMATIC-GENERATION OF ERROR CONTROL CODES FOR COMPUTER-APPLICATIONS

This paper proposes a methodology, implemented in a tool, to automatic ally generate the main classes of error control codes (ECC's) widely a pplied in computer memory systems to increase reliability and data int egrity. New code construction techniques extending the features of pre vious single error correcting (SEC)-double error detecting (DED)-singl e byte error detecting (SBD) codes have been integrated in the tool. T he proposed techniques construct systematic odd-weight-column SEC-DED- SBD codes with odd-bit-per-byte error correcting (OBC) capabilities to enhance reliability in high speed memory systems organized as multipl e-bit-per-chip or card.