FORMAL CODESIGN METHODOLOGY WITH MULTISTEP PARTITIONING

Citation
V. Carchiolo et al., FORMAL CODESIGN METHODOLOGY WITH MULTISTEP PARTITIONING, VLSI design (Print), 7(4), 1998, pp. 401-423
Citations number
36
Categorie Soggetti
Computer Science Hardware & Architecture","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
Journal title
ISSN journal
1065514X
Volume
7
Issue
4
Year of publication
1998
Pages
401 - 423
Database
ISI
SICI code
1065-514X(1998)7:4<401:FCMWMP>2.0.ZU;2-8
Abstract
A codesign methodology is proposed which is suitable for control-domin ated systems but can also be extended to more complex ones. Its main p urpose is to optimize the trade-off between hardware performance and s oftware reprogrammability and reconfigurability. The methodology propo sed intends to cover the development of the whole system. It deals in greater detail with the steps that can be made without the need for an y particular assumption regarding the target architecture. These steps concern splitting up the specification of the system into a set of in dividually synthesizable elements, and then grouping them for the subs equent mapping stage. In order to decrease the complexity of each part itioning attempt, a two step algorithm is proposed, thus permitting a wide exploration of possible solutions. The methodology is based on th e TTL language, an extension of the T-LOTOS Formal Description Techniq ue which provides a large amount of operators as well as a formal basi s. Finally, an example pointing out the complete design cycle, excepti ng the allocation stage is provided.