A COMPARATIVE-ANALYSIS OF THE DYNAMIC BEHAVIOR OF BTG SOI MOSFETS ANDCIRCUITS WITH DISTRIBUTED BODY RESISTANCE/

To examine the dynamic nature of body-tied-to-gate (BTG) partially dep leted SOI MOSFET's, CMOS inverter circuits (nine-stage ring oscillator s and 50-stage chains) are simulated with SOISPICE, accounting for the BTG distributed body resistance. Due to the physical nature of the UF SOI model in SOISPICE, both the static and dynamic characteristics of the BTG device, contrasted to floating-body (FB) and body-tied-to-sour ce (BTS) SOI MOSFET's, are faithfully revealed. Results give insight o n previously measured, get inadequately explained, dynamic behavior of the BTG device. Further, problematic hysteretic behavior associated w ith the dynamic operation of the device with realistic body sheet resi stance is described, suggesting design constraints on the maximum devi ce width. Finally, a performance assessment of the BTG device configur ation in ultralow-power CMOS digital applications is offered and compa red with FB and BTS, indicating that the optimal configuration is in f act application-specific.