DIELECTRIC-ASSISTED TRILAYER LIFT-OFF PROCESS FOR IMPROVED METAL DEFINITION

We have developed a simple, trilayer lift-off process for obtaining me tal of various thickness while retaining good feature definition down to 1 mu m, using only standard photoresist and developer, and e-beam e vaporated dielectric. This process has been implemented for fabricatio n of high speed circuits using InP/InGaAs/InP double heterojunction bi polar transistor devices. This structure is nonplanar, with a topograp hy of about 1.3 mu m from the top of the emitter to the substrate leve l for interconnects. Clean edges are obtained for all of the metalliza tion steps. Metal lift-off with our trilayer process is easily accompl ished by gentle rinsing with acetone, and does not require the use of high pressure spray or any heat treatment, such as boiling in a solven t to aid lift-off. This new process has greatly improved our circuit y ield. (C) 1998 American Vacuum Society. [S0734-211X(98)01105-6].