Sc. Lin et al., ANALYTICAL SUBTHRESHOLD CURRENT HUMP MODEL FOR DEEP-SUBMICRON SHALLOW-TRENCH-ISOLATED CMOS DEVICES, Solid-state electronics, 42(10), 1998, pp. 1871-1879
This paper reports an analytical subthreshold current hump model for d
eep-submicron shallow-trench-isolated CMOS devices. As verified by the
experimental data, this subthreshold current hump model can provide a
prediction of the back gate bias related subthreshold current hump ph
enomenon. According to the analytical model, with a more heavily doped
substrate, the current hump phenomenon occurs at a more negative back
gate bias. (C) 1998 Elsevier Science Ltd. All rights reserved.