REMOVAL OF THREADING DISLOCATIONS FROM PATTERNED HETEROEPITAXIAL SEMICONDUCTORS BY GLIDE TO SIDEWALLS

We have shown that threading dislocations can be removed from patterne d heteroepitaxial semiconductors by glide to the sidewalls, which is d riven by the presence of image forces. In principle, it should be poss ible to attain highly mismatched heteroepitaxial semiconductors which are completely free from threading dislocations, even though they are not pseudomorphic, by patterned heteroepitaxial processing. There are two basic approaches to patterned heteroepitaxial processing. The firs t involves selective area growth on a pre-patterned substrate. The sec ond approach involves post-growth patterning followed by annealing. We have developed a quantitative model which predicts that there is a ma ximum lateral dimension for complete removal of threading dislocations by patterned heteroepitaxy. According to our model, this maximum late ral dimension is proportional to the layer thickness and increases mon otonically with the lattice mismatch. For heteroepitaxial materials wi th greater than 1% lattice mismatch, our model predicts that practical device-sized threading dislocation-free regions may be realized by pa tterned heteroepitaxial processing.