D. Zhang et Mi. Elmasry, VLSI COMPRESSOR DESIGN WITH APPLICATIONS TO DIGITAL NEURAL NETWORKS, IEEE transactions on very large scale integration (VLSI) systems, 5(2), 1997, pp. 230-233
A key problem for implementing high-performance, high-capacity digital
neural networks (DNN) is to design effective VLSI compressors to redu
ce the impact of carry propagation of large data matrix. Tn this paper
, such a compressor design based on complex complementary pass-transis
tor logic ((CPL)-P-2) is presented. Some types of 3-2 compressors in (
CPL)-P-2 are implemented and a number of experiments are conducted to
optimize their performance. Two typical building blocks, 4-2 and 7-3 c
ompressors, are developed and their DNN applications are discussed. Co
mpared with the complementary pass-transistor logic (CPL) and the conv
entional direct logic (CDL), our simulations show that the (CPL)-P-2 c
ompressors have the best performance in power, delay and number of tra
nsistors.