HDL-SPECIFIC SOURCE LEVEL BEHAVIORAL OPTIMIZATION

Optimisation is a key facet of the behavioural synthesis problem. The process may be carried out at different levels in the processing, usua lly at the source or datapath levels, or both. In a previous paper, th e authors reported a source level VHDL optimiser which applies optimis ation techniques derived from conventional sequential and parallel pro gramming languages. This process produces structural descriptions that are up to 33% faster and 20% smaller than the corresponding 'brute fo rce' mapping of behaviour to structure. In the paper the authors descr ibe a further set of optimisation transforms that may be applied at th e source level to a VHDL behavioural description. These transforms hav e no conventional programming language counterpart, and are specific t o hardware description languages. A number of designs have been optimi sed with respect to area and/or delay, with and without these transfor ms. The results show that with this extra class of transforms there is an improvement of similar to 44% in delay and 38% in area.