LOCATION OF INDIVIDUAL TRAPS IN DRAM CELL TRANSISTORS BY CHARGE-PUMPING TECHNIQUE

This paper reports the adaptation of charge pumping on a single DRAM c ell for the in situ characterization of individual interface traps. Th e spatial trap distribution along the different interfaces of the DRAM cell transistor (under the gate and along the ONO/Si lateral interfac e) has been extensively investigated. Combining charge pumping measure ments with numerical simulations allows to extract the exact trap loca tions.