A design and manufacturing solution for high reliable non-leaded CSP's like QFN

Citation
G. Kuhnlein et A. Bos, A design and manufacturing solution for high reliable non-leaded CSP's like QFN, PROCEEDINGS OF 3RD ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE, 2000, pp. 169-175
Citations number
1
Categorie Soggetti
Current Book Contents
Year of publication
2000
Pages
169 - 175
Database
ISI
SICI code
Abstract
The ongoing miniaturization together with the increasing functionality of e lectronic equipment as for instant Mobile Phones, Camcorders, Laptops etc. have forced the semiconductor industry to develop in ever-shorter cycles sm aller and again thinner devices. The trend to chip scale area/perimeter arr ay packages is more than obvious. One of these extremely miniaturized IC-packages, first presented by Matsush ita under the designation QFN, from other manufacturer's called MLF, LPCC, QLP or VQFN have rapidly become popular with fast growing numbers. This kin d of device has already absorbed a part of the conventional Leaded devices as for example low pin count SOIC and TSSOP. One concern is the limited device reliability (JEDEC-moisture level 3), whi ch requires improvements aimed from the main market like telecommunication and automotive electronic manufacturers. The very fast-implemented miniaturization in the past has lead to reduced d evice reliability, as for instant the well-known "Popcorn phenomenon" from which the most of the thin devices like PBGA, TQFP, TSOP etc are suffering. In addition, increasing time to market pressure forces the industry to shor ten the package design time. Under this pressure, the complexity and link b etween package manufacturability and device reliability is sometimes neglec ted, or at least not respected enough. The resulting dissatisfaction have initiated a design and manufacturing pro cess research program, targeting best board assembly quality and a reliabil ity performance level of at least JEDEC-moisture level 1. By carefully analyzing all the constraints which limits the device- and boa rd assembly quality of such new devices by using all the experiences from t he past and by taking in consideration the capabilities of existing and wel l established assembly and packaging technologies, it should be possible to build and economically manufacture such devices in high volume, achieving the required board assembly quality and device reliability in the requested cost frame.