THE EFFECT OF THE ELEVATED SOURCE DRAIN DOPING PROFILE ON PERFORMANCEAND RELIABILITY OF DEEP-SUBMICRON MOSFETS

Deep submicron NMOSFET's with elevated source/drain (ESD) were fabrica ted using self-aligned selective epitaxial deposition and engineered i on implanted profiles in the elevated layers, Deeper source/drain (S/D ) junctions give rise to improved drive current over shallower profile s when the same spacer thickness and LDD doping level are used. Shallo wer junctions, especially with the heavily-doped S/D residing in the e levated layer, give better immunity to drain-induced-barrier lowering (DIBL) and bulk punchthrough, Tradeoffs between short-channel behavior and drive current with regard to S/D junction depth and spacer thickn ess were further studied using process/device simulations to cover a b roader range of structure parameters, Despite the existence of epi fac ets along the sidewall spacers, the elevated S/D could be used as a sa crificial layer for silicidation, without degradation of the low-leaka ge junctions, The effects of the elevated S/D doping profile on substr ate current and hot-electron-induced degradation were measured and ana lyzed. The simulated results were used, for the first time, to define the range of spacer thickness and LDD doses that are required in order for the lightly-doped region in the elevated S/D to effectively suppr ess the lateral electric field.