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Results: 76-100/306
Authors:
LAM KW
HUNG SL
Citation: Kw. Lam et Sl. Hung, INTEGRATED CONCURRENCY-CONTROL PROTOCOL FOR HARD REAL-TIME DATABASE-SYSTEMS, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 214-218
Authors:
WALTER CD
Citation: Cd. Walter, ANALYSIS OF DELAYS IN CONVERTING FROM A REDUNDANT REPRESENTATION, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 219-221
Authors:
CHAN WC
LU TC
CHEN RJ
Citation: Wc. Chan et al., POLLAEZEK-KHINCHIN FORMULA FOR THE M G/1 QUEUE IN DISCRETE-TIME WITH VACATIONS/, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 222-226
Authors:
SIMPSON HR
Citation: Hr. Simpson, NEW ALGORITHMS FOR ASYNCHRONOUS COMMUNICATION, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 227-231
Authors:
SIMPSON HR
Citation: Hr. Simpson, ROLE-MODEL ANALYSIS OF AN ASYNCHRONOUS COMMUNICATION MECHANISM, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 232-240
Authors:
SIMPSON HR
Citation: Hr. Simpson, MULTIREADER AND MULTIWRITER ASYNCHRONOUS COMMUNICATION MECHANISMS, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 241-243
Authors:
LAIH CS
LEE YC
Citation: Cs. Laih et Yc. Lee, V-FAIRNESS (T,N) SECRET SHARING SCHEME, IEE proceedings. Computers and digital techniques, 144(4), 1997, pp. 245-248
Authors:
ALBERT B
JAYASUMANA AP
Citation: B. Albert et Ap. Jayasumana, PERFORMANCE ANALYSIS OF FDDI LANS USING NUMERICAL-METHODS, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 149-154
Authors:
KU LP
LEONG HW
Citation: Lp. Ku et Hw. Leong, OPTIMUM PARTITIONING PROBLEM FOR RECTILINEAR VLSI LAYOUT, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 155-162
Authors:
LAM KP
TONG CW
Citation: Kp. Lam et Cw. Tong, CONNECTIONIST NETWORK FOR DYNAMIC-PROGRAMMING PROBLEMS, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 163-168
Authors:
CHERN SC
TUAN TC
JWO JS
Citation: Sc. Chern et al., HAMILTONICITY, VERTEX SYMMETRY, AND BROADCASTING OF UNIDIRECTIONAL HYPERCUBES, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 169-173
Authors:
FIELD AJ
HARRISON PG
Citation: Aj. Field et Pg. Harrison, STOCHASTIC-MODEL OF A CACHE-COHERENCY OVERHEAD IN SCI RINGS, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 175-186
Authors:
DRECHSLER R
BECKER B
Citation: R. Drechsler et B. Becker, OVERVIEW OF DECISION DIAGRAMS, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 187-193
Authors:
SWIM BR
BENMAIZA M
TAYLI M
WOODWARD MC
Citation: Br. Swim et al., PREDICTABLE DISTRIBUTED DYNAMIC SCHEDULING IN RTDOS, IEE proceedings. Computers and digital techniques, 144(3), 1997, pp. 195-207
Authors:
PATNAIK LM
RAMAKRISHNA AK
MURALIDHARAN R
Citation: Lm. Patnaik et al., DISTRIBUTED ALGORITHMS FOR MOBILE HOSTS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 49-56
Authors:
BELLIS SJ
MARNANE WP
FISH PJ
Citation: Sj. Bellis et al., ALTERNATIVE SYSTOLIC ARRAY FOR NON-SQUARE-ROOT CHOLESKY DECOMPOSITION, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 57-64
Authors:
FLEURY M
DOWNTON AC
CLARK AF
SAVA HP
Citation: M. Fleury et al., DESIGN OF A CLOCK SYNCHRONIZATION SUBSYSTEM FOR PARALLEL EMBEDDED SYSTEMS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 65-73
Authors:
KOLLIG P
ALHASHIMI BM
ABBOTT KM
Citation: P. Kollig et al., EFFICIENT SCHEDULING OF BEHAVIORAL DESCRIPTIONS IN HIGH-LEVEL SYNTHESIS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 75-82
Authors:
LEE YH
CHONG JW
RUSSELL G
Citation: Yh. Lee et al., MULTILEVEL LOGIC SYNTHESIS TECHNIQUE FOR EFFICIENT VERIFICATION TESTING, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 83-91
Authors:
BOYD C
MATHURIA A
Citation: C. Boyd et A. Mathuria, SYSTEMATIC DESIGN OF KEY ESTABLISHMENT PROTOCOLS BASED ON ONE-WAY FUNCTIONS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 93-99
Authors:
ZHANG Y
KAMEDA H
HUNG SL
Citation: Y. Zhang et al., COMPARISON OF DYNAMIC AND STATIC LOAD-BALANCING STRATEGIES IN HETEROGENEOUS DISTRIBUTED SYSTEMS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 100-106
Authors:
MEGSON GM
BLAND IM
Citation: Gm. Megson et Im. Bland, GENERIC SYSTOLIC ARRAY FOR GENETIC ALGORITHMS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 107-119
Authors:
SHEW PW
HSIAO PY
Citation: Pw. Shew et Py. Hsiao, PLANAR CONSTRAINED TERMINALS OVER-THE-CELL ROUTER, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 121-126
Authors:
FERNANDES JM
ADAMSKI M
PROENCA AJ
Citation: Jm. Fernandes et al., VHDL GENERATION FROM HIERARCHICAL PETRI-NET SPECIFICATIONS OF PARALLEL CONTROLLERS, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 127-137
Authors:
NIJHAR TPK
BROWN AD
Citation: Tpk. Nijhar et Ad. Brown, HDL-SPECIFIC SOURCE LEVEL BEHAVIORAL OPTIMIZATION, IEE proceedings. Computers and digital techniques, 144(2), 1997, pp. 138-144