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Results: 1-14 |
Results: 14
ALGEBRAIC PROPERTIES OF MULTIPLE-VALUED MODULE SYSTEMS AND THEIR APPLICATIONS TO CURRENT-MODE CMOS CIRCUITS
Authors: WANG L CHEN X ALMAINI AEA
Citation: L. Wang et al., ALGEBRAIC PROPERTIES OF MULTIPLE-VALUED MODULE SYSTEMS AND THEIR APPLICATIONS TO CURRENT-MODE CMOS CIRCUITS, IEE proceedings. Computers and digital techniques, 145(5), 1998, pp. 364-368
MODULO CORRELATIVITY AND ITS APPLICATION IN A MULTIPLE-VALUED LOGIC SYSTEM
Authors: WANG L CHEN X ALMAINI AEA
Citation: L. Wang et al., MODULO CORRELATIVITY AND ITS APPLICATION IN A MULTIPLE-VALUED LOGIC SYSTEM, International journal of electronics (Print), 85(5), 1998, pp. 561-570
REVERSED ROBDD CIRCUITS
Authors: BYSTROV A ALMAINI AEA
Citation: A. Bystrov et Aea. Almaini, REVERSED ROBDD CIRCUITS, Electronics Letters, 34(15), 1998, pp. 1447-1449
A SEMICUSTOM IC FOR GENERATING OPTIMUM GENERALIZED REED-MULLER EXPANSIONS
Authors: ALMAINI AEA
Citation: Aea. Almaini, A SEMICUSTOM IC FOR GENERATING OPTIMUM GENERALIZED REED-MULLER EXPANSIONS, Microelectronics, 28(2), 1997, pp. 129-142
GENERATING KRONECKER EXPANSIONS FROM REDUCED BOOLEAN FORMS USING TABULAR METHODS
Authors: MCKENZIE L ALMAINI AEA
Citation: L. Mckenzie et Aea. Almaini, GENERATING KRONECKER EXPANSIONS FROM REDUCED BOOLEAN FORMS USING TABULAR METHODS, International journal of electronics, 82(4), 1997, pp. 313-325
TABULAR TECHNIQUES FOR GENERATING KRONECKER EXPANSIONS
Authors: ALMAINI AEA MCKENZIE L
Citation: Aea. Almaini et L. Mckenzie, TABULAR TECHNIQUES FOR GENERATING KRONECKER EXPANSIONS, IEE proceedings. Computers and digital techniques, 143(4), 1996, pp. 205-212
STATE ASSIGNMENT OF FINITE-STATE MACHINES USING A GENETIC ALGORITHM
Authors: ALMAINI AEA MILLER JF THOMSON P BILLINA S
Citation: Aea. Almaini et al., STATE ASSIGNMENT OF FINITE-STATE MACHINES USING A GENETIC ALGORITHM, IEE proceedings. Computers and digital techniques, 142(4), 1995, pp. 279-286
USING GENETIC ALGORITHMS FOR THE VARIABLE ORDERING OF REED-MULLER BINARY DECISION DIAGRAMS
Authors: ALMAINI AEA ZHUANG N
Citation: Aea. Almaini et N. Zhuang, USING GENETIC ALGORITHMS FOR THE VARIABLE ORDERING OF REED-MULLER BINARY DECISION DIAGRAMS, Microelectronics, 26(5), 1995, pp. 471-480
ONE-BIT ADDER DESIGN BASED ON REED-MULLER EXPANSIONS
Authors: GUAN Z ALMAINI AEA
Citation: Z. Guan et Aea. Almaini, ONE-BIT ADDER DESIGN BASED ON REED-MULLER EXPANSIONS, International journal of electronics, 79(5), 1995, pp. 519-529
MINIMIZATION OF MULTIOUTPUT REED-MULLER BINARY DECISION DIAGRAMS USING HYBRID GENETIC ALGORITHM
Authors: ALMAINI AEA ZHUANG N BOURSET F
Citation: Aea. Almaini et al., MINIMIZATION OF MULTIOUTPUT REED-MULLER BINARY DECISION DIAGRAMS USING HYBRID GENETIC ALGORITHM, Electronics Letters, 31(20), 1995, pp. 1722-1723
REED-MULLER UNIVERSAL LOGIC MODULE NETWORKS
Authors: XU L ALMAINI AEA MILLER JF MCKENZIE L
Citation: L. Xu et al., REED-MULLER UNIVERSAL LOGIC MODULE NETWORKS, IEE proceedings. Part E. Computers and digital techniques, 140(2), 1993, pp. 105-108
A SIMPLE AND HIGH-SPEED CMOS CARRY CHAIN ADDER ARCHITECTURE
Authors: GUAN Z ALMAINI AEA THOMSON P
Citation: Z. Guan et al., A SIMPLE AND HIGH-SPEED CMOS CARRY CHAIN ADDER ARCHITECTURE, International journal of electronics, 75(4), 1993, pp. 743-752
OPTIMIZATION OF REED-MULLER LOGIC FUNCTIONS
Authors: MCKENZIE L ALMAINI AEA MILLER JF THOMSON P
Citation: L. Mckenzie et al., OPTIMIZATION OF REED-MULLER LOGIC FUNCTIONS, International journal of electronics, 75(3), 1993, pp. 451-466
FULL-CUSTOM DESIGN OF REED-MULLER UNIVERSAL LOGIC MODULES
Authors: XU L ALMAINI AEA
Citation: L. Xu et Aea. Almaini, FULL-CUSTOM DESIGN OF REED-MULLER UNIVERSAL LOGIC MODULES, International journal of electronics, 74(4), 1993, pp. 605-613
Risultati: 1-14 |