Authors: SHIN KW SONG BS BACRANIA K

Citation: Kw. Shin et al., A 200-MHZ COMPLEX NUMBER MULTIPLIER USING REDUNDANT BINARY ARITHMETIC, IEEE journal of solid-state circuits, 33(6), 1998, pp. 904-909

Authors: KWAK SU SONG BS BACRANIA K

Citation: Su. Kwak et al., A 15-B, 5-MSAMPLE S LOW-SPURIOUS CMOS ADC, IEEE journal of solid-state circuits, 32(12), 1997, pp. 1866-1875

Authors: SHU TH BACRANIA K GOKHALE R

Citation: Th. Shu et al., A 10-B 40-MSAMPLE S BICMOS A D CONVERTER, IEEE journal of solid-state circuits, 31(10), 1996, pp. 1507-1510

Authors: SHU TH SONG BS BACRANIA K

Citation: Th. Shu et al., A 13-B 10-MSAMPLE S ADC DIGITALLY CALIBRATED WITH OVERSAMPLING DELTA-SIGMA CONVERTER/, IEICE transactions on electronics, E78C(6), 1995, pp. 691-700

Authors: SHU TH SONG BS BACRANIA K

Citation: Th. Shu et al., A 13-B 10-MSAMPLE S ADC DIGITALLY CALIBRATED WITH OVERSAMPLING DELTA-SIGMA CONVERTER/, IEEE journal of solid-state circuits, 30(4), 1995, pp. 443-452