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Citation: E. Bruls, ASYNCHRONOUS DESIGN - NIGHTMARE OR OPPORTUNITY, IEEE design & test of computers, 14(1), 1997, pp. 84-85

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Citation: E. Bruls et al., ANALOG FAULT SIMULATION IN STANDARD VHDL, IEE proceedings. Circuits, devices and systems, 143(6), 1996, pp. 380-385

Authors: BRULS E

Citation: E. Bruls, QUALITY AND RELIABILITY IMPACT OF DEFECT DATA-ANALYSIS, IEEE transactions on semiconductor manufacturing, 8(2), 1995, pp. 121-129

Authors: BRULS E SACHDEV M BAKER K

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