Authors: LEE T CHUANG WT HAJJ IN FUCHS WK

Citation: T. Lee et al., CIRCUIT-LEVEL DICTIONARIES OF CMOS BRIDGING FAULTS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(5), 1995, pp. 596-603

Authors: CHUANG WT SAPATNEKAR SS HAJJ IN

Citation: Wt. Chuang et al., TIMING AND AREA OPTIMIZATION FOR STANDARD-CELL VLSI CIRCUIT-DESIGN, IEEE transactions on computer-aided design of integrated circuits and systems, 14(3), 1995, pp. 308-320