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Results:
1-3
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Results: 3
Strategy for characterization and evaluation of ESD robustness of CMOS semiconductor technologies
Authors:
Voldman, S Anderson, W Ashton, R Chaine, M Duvvury, C Maloney, T Worley, E
Citation:
S. Voldman et al., Strategy for characterization and evaluation of ESD robustness of CMOS semiconductor technologies, MICROEL REL, 41(3), 2001, pp. 335-348
Investigation into socketed CDM (SDM) tester parasitics
Authors:
Chaine, M Verhaege, K Avery, L Kelly, M Gieser, H Bock, K Henry, LG Meuse, T Brodbeck, T Barth, J
Citation:
M. Chaine et al., Investigation into socketed CDM (SDM) tester parasitics, MICROEL REL, 39(11), 1999, pp. 1531-1540
Unique ESD failure mechanisms during negative to Vcc HBM tests
Authors:
Chaine, M Smith, S Bui, A
Citation:
M. Chaine et al., Unique ESD failure mechanisms during negative to Vcc HBM tests, MICROEL REL, 38(11), 1998, pp. 1749-1761
Risultati:
1-3
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