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Results: 1-7 |
Results: 7
A 220-MM(2), 4-BANK AND 8-BANK, 256-MB SDRAM WITH SINGLE-SIDED STITCHED WL ARCHITECTURE
Authors: KIRIHATA T GALL M HOSOKAWA K DORTU JM WONG H PFEFFERL P JI BL WEINFURTNER O DEBROSSE JK TERLETZKI H SELZ M ELLIS W WORDEMAN MR KIEHL O
Citation: T. Kirihata et al., A 220-MM(2), 4-BANK AND 8-BANK, 256-MB SDRAM WITH SINGLE-SIDED STITCHED WL ARCHITECTURE, IEEE journal of solid-state circuits, 33(11), 1998, pp. 1711-1719
FLEXIBLE TEST MODE APPROACH FOR 256-MB DRAM
Authors: KIRIHATA T WONG H DEBROSSE JK WATANABE Y HARA T YOSHIDA M WORDEMAN MR FUJII S ASAO Y KRSNIK B
Citation: T. Kirihata et al., FLEXIBLE TEST MODE APPROACH FOR 256-MB DRAM, IEEE journal of solid-state circuits, 32(10), 1997, pp. 1525-1534
FAULT-TOLERANT DESIGNS FOR 256 MB DRAM
Authors: KIRIHATA T WATANABE Y WONG H DEBROSSE JK KATO D FUJII S WORDEMAN MR POECHMUELLER P PARKE SA ASAO Y
Citation: T. Kirihata et al., FAULT-TOLERANT DESIGNS FOR 256 MB DRAM, IEICE transactions on electronics, E79C(7), 1996, pp. 969-977
A 286MM(2) 256 MB DRAM WITH X32 BOTH-ENDS DQ
Authors: WATANABE Y WONG H KIRIHATA T KATO D DEBROSSE JK HARA T YOSHIDA M MUKAI H QUADER KN NAGAI T POECHMUELLER P PFEFFERL P WORDEMAN MR FUJII S
Citation: Y. Watanabe et al., A 286MM(2) 256 MB DRAM WITH X32 BOTH-ENDS DQ, IEICE transactions on electronics, E79C(7), 1996, pp. 978-985
FAULT-TOLERANT DESIGNS FOR 256 MB DRAM
Authors: KIRIHATA T WATANABE Y WONG H DEBROSSE JK YOSHIDA M KATO D FUJII S WORDEMAN MR POECHMUELLER P PARKE SA ASAO Y
Citation: T. Kirihata et al., FAULT-TOLERANT DESIGNS FOR 256 MB DRAM, IEEE journal of solid-state circuits, 31(4), 1996, pp. 558-566
A 286MM(2) 256MB DRAM WITH X32 BOTH-ENDS DQ
Authors: WATANABE Y WONG H KIRIHATA T KATO D DEBROSSE JK HARA T YOSHIDA M MUKAI H QUADER KN NAGAI T POECHMUELLER P PFEFFERL P WORDEMAN MR FUJII S
Citation: Y. Watanabe et al., A 286MM(2) 256MB DRAM WITH X32 BOTH-ENDS DQ, IEEE journal of solid-state circuits, 31(4), 1996, pp. 567-574
THE EVOLUTION OF IBM CMOS DRAM TECHNOLOGY
Authors: ADLER E DEBROSSE JK GEISSLER SF HOLMES SJ JAFFE MD JOHNSON JB KOBURGER CW LASKY JB LLOYD B MILES GL NAKOS JS NOBLE WP VOLDMAN SH ARMACOST M FERGUSON R
Citation: E. Adler et al., THE EVOLUTION OF IBM CMOS DRAM TECHNOLOGY, IBM journal of research and development, 39(1-2), 1995, pp. 167-188
Risultati: 1-7 |