Authors: Hsu, JM Dehng, GK Yang, CY Yang, CY Liu, SI

Citation: Jm. Hsu et al., Low-voltage CMOS frequency synthesizer for ERMES pager application, IEEE CIR-II, 48(9), 2001, pp. 826-834

Authors: Dehng, GK Lin, JW Liu, SI

Citation: Gk. Dehng et al., A fast-lock mixed-mode DLL using a 2-b SAR algorithm, IEEE J SOLI, 36(10), 2001, pp. 1464-1471

Authors: Chen, WH Dehng, GK Chen, JW Liu, SI

Citation: Wh. Chen et al., A CMOS 400-Mb/s serial link for AS-memory systems using a PWM scheme, IEEE J SOLI, 36(10), 2001, pp. 1498-1505

Authors: Dehng, GK Hsu, JM Yang, CY Liu, SI

Citation: Gk. Dehng et al., Clock-deskew buffer using a SAR-Controlled delay-locked loop, IEEE J SOLI, 35(8), 2000, pp. 1128-1136

Authors: Dehng, GK Yang, CY Hsu, JM Liu, SI

Citation: Gk. Dehng et al., A 900-MHz 1-V CMOS frequency synthesizer, IEEE J SOLI, 35(8), 2000, pp. 1211-1214