Authors: HARAICHI S WADA T GORWADKAR SM ISHII K

Citation: S. Haraichi et al., FABRICATION OF NANOMETER-SCALE VERTICAL METAL-INSULATOR-METAL TUNNEL-JUNCTIONS USING A SILICON-ON-INSULATOR SUBSTRATE, JPN J A P 1, 37(3B), 1998, pp. 1580-1583

Authors: WADA T HARAICHI S ISHII K HIROSHIMA H KOMURO M GORWADKAR SM

Citation: T. Wada et al., THE USE OF A SI-BASED RESIST SYSTEM AND TI ELECTRODE FOR THE FABRICATION OF SUB-10 NM METAL-INSULATOR-METAL TUNNEL-JUNCTIONS, Journal of vacuum science & technology. A. Vacuum, surfaces, and films, 16(3), 1998, pp. 1430-1434

Authors: HARAICHI S WADA T GORWADKAR SM ISHII K HIROSHIMA H

Citation: S. Haraichi et al., ELECTRON-BEAM DOT LITHOGRAPHY FOR NANOMETER-SCALE TUNNEL-JUNCTIONS USING A DOUBLE-LAYERED INORGANIC RESIST, Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena, 15(4), 1997, pp. 1406-1410

Authors: GORWADKAR SM WADA T HARAICHI S HIROSHIMA H ISHII K KOMURO M

Citation: Sm. Gorwadkar et al., SIO2 C-SI BILAYER ELECTRON-BEAM RESIST PROCESS FOR NANO-FABRICATION/, JPN J A P 1, 35(12B), 1996, pp. 6673-6678