AAAAAA

   
Results: 1-9 |
Results: 9
Speed up of rendering pipeline by deferred lighting and triple queue structure
Authors: Liang, BS Jen, CW
Citation: Bs. Liang et Cw. Jen, Speed up of rendering pipeline by deferred lighting and triple queue structure, ELECTR LETT, 37(22), 2001, pp. 1332-1333
The thermal conversion efficiency in YBa2Cu3O7-delta microbridges for optical detection
Authors: Hong, MT Jen, CW Chu, HH Chow, TC Chen, YC Chou, H
Citation: Mt. Hong et al., The thermal conversion efficiency in YBa2Cu3O7-delta microbridges for optical detection, JPN J A P 1, 39(5A), 2000, pp. 2599-2603
Hardware-efficient DFT designs with cyclic convolution and subexpression sharing
Authors: Chang, TS Guo, JI Jen, CW
Citation: Ts. Chang et al., Hardware-efficient DFT designs with cyclic convolution and subexpression sharing, IEEE CIR-II, 47(9), 2000, pp. 886-892
Low-power FIR filter realization with differential coefficients and inputs
Authors: Chang, TS Chu, YH Jen, CW
Citation: Ts. Chang et al., Low-power FIR filter realization with differential coefficients and inputs, IEEE CIR-II, 47(2), 2000, pp. 137-145
A simple processor core design for DCT/IDCT
Authors: Chang, TS Kung, CS Jen, CW
Citation: Ts. Chang et al., A simple processor core design for DCT/IDCT, IEEE CIR SV, 10(3), 2000, pp. 439-447
Computation-effective 3-D graphics rendering architecture for embedded multimedia system
Authors: Liang, BS Jen, CW
Citation: Bs. Liang et Cw. Jen, Computation-effective 3-D graphics rendering architecture for embedded multimedia system, IEEE CONS E, 46(3), 2000, pp. 735-743
High-speed booth encoded parallel multiplier design
Authors: Yeh, WC Jen, CW
Citation: Wc. Yeh et Cw. Jen, High-speed booth encoded parallel multiplier design, IEEE COMPUT, 49(7), 2000, pp. 692-701
New distributed arithmetic algorithm and its application to IDCT
Authors: Chang, TS Chen, C Jen, CW
Citation: Ts. Chang et al., New distributed arithmetic algorithm and its application to IDCT, IEE P-CIRC, 146(4), 1999, pp. 159-163
Hardware-efficient implementations for discrete function transforms using LUT-based FPGAs
Authors: Chang, TS Jen, CW
Citation: Ts. Chang et Cw. Jen, Hardware-efficient implementations for discrete function transforms using LUT-based FPGAs, IEE P-COM D, 146(6), 1999, pp. 309-315
Risultati: 1-9 |