Citation: Ai. Kayssi, MACROMODEL CONSTRUCTION AND VERIFICATION - ENHANCING THE PROCESS WITHDIMENSIONAL ANALYSIS, IEEE circuits and devices magazine, 14(3), 1998, pp. 34-39
Citation: Ai. Kayssi et Ka. Sakallah, TIMING MODELS FOR GALLIUM-ARSENIDE DIRECT-COUPLED FET LOGIC-CIRCUITS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(3), 1995, pp. 384-393
Citation: Ai. Kayssi et Ka. Sakallah, DELAY MACROMODELS FOR POINT-TO-POINT MCM INTERCONNECTIONS, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 17(2), 1994, pp. 147-152
Citation: Ai. Kayssi et al., THE IMPACT OF SIGNAL TRANSITION TIME ON PATH DELAY COMPUTATION, IEEE transactions on circuits and systems. 2, Analog and digital signal processing, 40(5), 1993, pp. 302-309