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Authors: AGARWAL V KIM KS CHENG T KHARE J SONNIER G ROY R
Citation: V. Agarwal et al., A D-AND-T ROUND-TABLE - BUILT-IN SELF-TEST FOR DESIGNERS - DISCUSSION, IEEE design & test of computers, 14(3), 1997, pp. 113-121

Authors: KHARE J MALY W
Citation: J. Khare et W. Maly, RAPID FAILURE ANALYSIS USING CONTAMINATION-DEFECT-FAULT (CDF) SIMULATION, IEEE transactions on semiconductor manufacturing, 9(4), 1996, pp. 518-526

Authors: SCHMITTLANDSIEDEL D KEITELSCHULZ D KHARE J GRIEP S MALY W
Citation: D. Schmittlandsiedel et al., CRITICAL AREA ANALYSIS FOR DESIGN-BASED YIELD IMPROVEMENT OF VLSI CIRCUITS, Quality and reliability engineering international, 11(4), 1995, pp. 227-232
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