Authors:
KIRIHATA T
GALL M
HOSOKAWA K
DORTU JM
WONG H
PFEFFERL P
JI BL
WEINFURTNER O
DEBROSSE JK
TERLETZKI H
SELZ M
ELLIS W
WORDEMAN MR
KIEHL O
Citation: T. Kirihata et al., A 220-MM(2), 4-BANK AND 8-BANK, 256-MB SDRAM WITH SINGLE-SIDED STITCHED WL ARCHITECTURE, IEEE journal of solid-state circuits, 33(11), 1998, pp. 1711-1719
Citation: Sh. Dhong et al., A LOW-NOISE TTL-COMPATIBLE CMOS OFF-CHIP DRIVER CIRCUIT, IBM journal of research and development, 39(1-2), 1995, pp. 105-112