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Results: 1-9 |
Results: 9
LINKING BEHAVIORAL, STRUCTURAL, AND PHYSICAL MODELS OF HARDWARE
Authors: KURDAHI FJ
Citation: Fj. Kurdahi, LINKING BEHAVIORAL, STRUCTURAL, AND PHYSICAL MODELS OF HARDWARE, VLSI design, 5(2), 1997, pp. 1-2
OPTIMAL-ALGORITHMS FOR RECOVERY POINT INSERTION IN RECOVERABLE MICROARCHITECTURES
Authors: BLOUGH DM KURDAHI FJ OHM SY
Citation: Dm. Blough et al., OPTIMAL-ALGORITHMS FOR RECOVERY POINT INSERTION IN RECOVERABLE MICROARCHITECTURES, IEEE transactions on computer-aided design of integrated circuits and systems, 16(9), 1997, pp. 945-955
A UNIFIED LOWER-BOUND ESTIMATION TECHNIQUE FOR HIGH-LEVEL SYNTHESIS
Authors: OHM SY KURDAHI FJ DUTT ND
Citation: Sy. Ohm et al., A UNIFIED LOWER-BOUND ESTIMATION TECHNIQUE FOR HIGH-LEVEL SYNTHESIS, IEEE transactions on computer-aided design of integrated circuits and systems, 16(5), 1997, pp. 458-472
LAYOUT DRIVEN LOGIC SYNTHESIS SYSTEM
Authors: CHEN Y TSAI WK KURDAHI FJ
Citation: Y. Chen et al., LAYOUT DRIVEN LOGIC SYNTHESIS SYSTEM, IEE proceedings. Circuits, devices and systems, 142(3), 1995, pp. 158-164
AN OPTIMAL SCHEDULING APPROACH USING LOWER-BOUND IN HIGH-LEVEL SYNTHESIS
Authors: OHM SY KURDAHI FJ JHON CS
Citation: Sy. Ohm et al., AN OPTIMAL SCHEDULING APPROACH USING LOWER-BOUND IN HIGH-LEVEL SYNTHESIS, IEICE transactions on information and systems, E78D(3), 1995, pp. 231-236
COMBINED TOPOLOGICAL AND FUNCTIONALITY-BASED DELAY ESTIMATION USING ALAYOUT-DRIVEN APPROACH FOR HIGH-LEVEL APPLICATIONS
Authors: RAMACHANDRAN C KURDAHI FJ
Citation: C. Ramachandran et Fj. Kurdahi, COMBINED TOPOLOGICAL AND FUNCTIONALITY-BASED DELAY ESTIMATION USING ALAYOUT-DRIVEN APPROACH FOR HIGH-LEVEL APPLICATIONS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(12), 1994, pp. 1450-1460
ON THE INTRINSIC RENT PARAMETER AND SPECTRA-BASED PARTITIONING METHODOLOGIES
Authors: HAGEN L KAHNG AB KURDAHI FJ RAMACHANDRAN C
Citation: L. Hagen et al., ON THE INTRINSIC RENT PARAMETER AND SPECTRA-BASED PARTITIONING METHODOLOGIES, IEEE transactions on computer-aided design of integrated circuits and systems, 13(1), 1994, pp. 27-37
LINKING REGISTER-TRANSFER AND PHYSICAL LEVELS OF DESIGN
Authors: KURDAHI FJ GAJSKI DD RAMACHANDRAN C CHAIYAKUL V
Citation: Fj. Kurdahi et al., LINKING REGISTER-TRANSFER AND PHYSICAL LEVELS OF DESIGN, IEICE transactions on information and systems, E76D(9), 1993, pp. 991-1005
ON CLUSTERING FOR MAXIMAL REGULARITY EXTRACTION
Authors: RAO DS KURDAHI FJ
Citation: Ds. Rao et Fj. Kurdahi, ON CLUSTERING FOR MAXIMAL REGULARITY EXTRACTION, IEEE transactions on computer-aided design of integrated circuits and systems, 12(8), 1993, pp. 1198-1208
Risultati: 1-9 |