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Results: 1-13 |
Results: 13
vEC: Virtual Energy Counters
Authors: Kadayif, I Chinoda, T Kandemir, M Vijaykrishnan, N Irwin, MJ Sivasubramaniam, A
Citation: I. Kadayif et al., vEC: Virtual Energy Counters, ACM SIGPL N, 2001, pp. 28-31
Morphable cache architectures: Potential benefits
Authors: Kadayif, I Kandemir, M Vijaykrishnan, N Irwin, MJ Ramanujam, J
Citation: I. Kadayif et al., Morphable cache architectures: Potential benefits, ACM SIGPL N, 36(8), 2001, pp. 128-137
Investigating memory system energy behavior using software and hardware optimizations
Authors: Esakkimuthu, G Kim, HS Kandemir, M Vijaykrishnan, N Irwin, MJ
Citation: G. Esakkimuthu et al., Investigating memory system energy behavior using software and hardware optimizations, VLSI DESIGN, 12(2), 2001, pp. 151-165
Static and dynamic locality optimizations using integer linear programming
Authors: Kandemir, M Banerjee, P Choudhary, A Ramanujam, J Ayguade, E
Citation: M. Kandemir et al., Static and dynamic locality optimizations using integer linear programming, IEEE PARALL, 12(9), 2001, pp. 922-941
Data relation vectors: A new abstraction for data optimizations
Authors: Kandemir, M Ramanujam, J
Citation: M. Kandemir et J. Ramanujam, Data relation vectors: A new abstraction for data optimizations, IEEE COMPUT, 50(8), 2001, pp. 798-810
Hardware and software techniques for controlling DRAM power modes
Authors: Delaluz, V Kandemir, M Vijaykrishnan, N Sivasubramaniam, A Irwin, MJ
Citation: V. Delaluz et al., Hardware and software techniques for controlling DRAM power modes, IEEE COMPUT, 50(11), 2001, pp. 1154-1173
A unified framework for optimizing locality, parallelism, and communication in out-of-core computations
Authors: Kandemir, M Choudhary, A Ramanujam, J Kandaswamy, MA
Citation: M. Kandemir et al., A unified framework for optimizing locality, parallelism, and communication in out-of-core computations, IEEE PARALL, 11(7), 2000, pp. 648-668
Minimizing data and synchronization costs in one-way communication
Authors: Kandemir, M Choudhary, A Banerjee, P Ramanujam, J Shenoy, N
Citation: M. Kandemir et al., Minimizing data and synchronization costs in one-way communication, IEEE PARALL, 11(12), 2000, pp. 1232-1251
Compiler algorithms for optimizing locality and parallelism on shared and distributed-memory machines
Authors: Kandemir, M Ramanujam, J Choudhary, A
Citation: M. Kandemir et al., Compiler algorithms for optimizing locality and parallelism on shared and distributed-memory machines, J PAR DISTR, 60(8), 2000, pp. 924-965
A linear algebra framework for automatic determination of optimal data layouts
Authors: Kandemir, M Shenoy, N Banerjee, P Ramanujam, J
Citation: M. Kandemir et al., A linear algebra framework for automatic determination of optimal data layouts, IEEE PARALL, 10(2), 1999, pp. 115-135
A matrix-based approach to global locality optimization
Authors: Kandemir, M Choudhary, A Ramanujam, J Banerjee, P
Citation: M. Kandemir et al., A matrix-based approach to global locality optimization, J PAR DISTR, 58(2), 1999, pp. 190-235
A global communication optimization technique based on data-flow analysis and linear algebra
Authors: Kandemir, M Banerjee, P Choudhary, A Ramanujam, J Shenoy, N
Citation: M. Kandemir et al., A global communication optimization technique based on data-flow analysis and linear algebra, ACM T PROGR, 21(6), 1999, pp. 1251-1297
Improving cache locality by a combination of loop and data transformations
Authors: Kandemir, M Ramanujam, J Choudhary, A
Citation: M. Kandemir et al., Improving cache locality by a combination of loop and data transformations, IEEE COMPUT, 48(2), 1999, pp. 159-167
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