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Results: 1-3 |
Results: 3

Authors: Odanaka, S Misaka, A Yamashita, K
Citation: S. Odanaka et al., A design hierarchy of IC interconnects and gate patterns, IEICE TR EL, E82C(6), 1999, pp. 948-954

Authors: Harafuji, K Ohkuni, M Kubota, M Nakagawa, H Misaka, A
Citation: K. Harafuji et al., Simulation approach for achieving layout independent polysilicon gate etching, IEEE DEVICE, 46(6), 1999, pp. 1105-1112

Authors: Tominaga, M Hashimoto, S Misaka, A Nakashima, N
Citation: M. Tominaga et al., Thermal stability and electrode reaction of Chlorella ferredoxin embedded in artificial lipid bilayer membrane films on a graphite electrode, ANALYT CHEM, 71(14), 1999, pp. 2790-2796
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