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Results: 3

Authors: Noguchi, M Numata, T Mitani, Y Shino, T Kawanaka, S Oowaki, Y Toriumi, A
Citation: M. Noguchi et al., Back gate effects on threshold voltage sensitivity to SOI thickness in fully-depleted SOI MOSFETs, IEEE ELEC D, 22(1), 2001, pp. 32-34

Authors: Takashima, D Takeuchi, Y Miyakawa, T Itoh, Y Ogiwara, R Kamoshida, M Hoya, K Doumae, SM Ozaki, T Kanaya, H Yamakawa, K Kunishima, I Oowaki, Y
Citation: D. Takashima et al., A 76-mm(2) 8-Mb chain ferroelectric memory, IEEE J SOLI, 36(11), 2001, pp. 1713-1720

Authors: Takashima, D Shuto, S Kunishima, I Takenaka, H Oowaki, Y Tanaka, S
Citation: D. Takashima et al., A sub-40-ns chain FRAM architecture with 7-ns cell-plate-line drive, IEEE J SOLI, 34(11), 1999, pp. 1557-1563
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