Citation: Wc. Kao et Tm. Parng, INTEGRATING STATISTICAL AND STRUCTURAL APPROACHES TO HANDPRINTED CHINESE CHARACTER-RECOGNITION, IEICE transactions on information and systems, E81D(4), 1998, pp. 391-400
Citation: St. Huang et al., A POLYNOMIAL-TIME HEURISTIC APPROACH TO SOLVING THE FALSE PATH PROBLEM, IEEE transactions on circuits and systems. 1, Fundamental theory andapplications, 43(5), 1996, pp. 386-396
Citation: Cs. Lee et Tm. Parng, A SUBSYSTEM-ORIENTED PERFORMANCE ANALYSIS METHODOLOGY FOR SHARED-BUS MULTIPROCESSORS, IEEE transactions on parallel and distributed systems, 7(7), 1996, pp. 755-767
Citation: Yf. Ke et Tm. Parng, A PARALLEL HARDWARE ARCHITECTURE FOR ACCELERATING ALPHA-BETA GAME TREE-SEARCH, IEICE transactions on information and systems, E79D(9), 1996, pp. 1232-1240
Citation: Yf. Ke et Tm. Parng, PARALLEL MOVE GENERATION SYSTEM FOR COMPUTER-CHESS, IEICE transactions on information and systems, E79D(4), 1996, pp. 290-296
Citation: Cs. Lee et Tm. Parng, PERFORMANCE MODELING AND EVALUATION OF A 2-DIMENSIONAL DISK ARRAY SYSTEM, Journal of parallel and distributed computing, 38(1), 1996, pp. 16-27
Citation: Cs. Lee et Tm. Parng, BOTTLENECK IDENTIFICATION METHODOLOGY FOR PERFORMANCE-ORIENTED DESIGNOF SHARED-BUS MULTIPROCESSORS, IEICE transactions on information and systems, E78D(8), 1995, pp. 982-991
Citation: Wc. Kao et Tm. Parng, CROSS POINT ASSIGNMENT WITH GLOBAL REROUTING FOR GENERAL-ARCHITECTUREDESIGNS, IEEE transactions on computer-aided design of integrated circuits and systems, 14(3), 1995, pp. 337-348
Citation: St. Huang et al., TIMED BOOLEAN CALCULUS AND ITS APPLICATIONS IN TIMING ANALYSIS, IEEE transactions on computer-aided design of integrated circuits and systems, 13(3), 1994, pp. 318-337
Authors:
JANG GS
LAI FP
JIANG BW
PARNG TM
CHIEN LH
Citation: Gs. Jang et al., INTELLIGENT STOCK TRADING SYSTEM WITH PRICE TREND PREDICTION AND REVERSAL RECOGNITION USING DUAL-MODULE NEURAL NETWORKS, Applied intelligence, 3(3), 1993, pp. 225-248