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Results:
1-4
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Results: 4
A multiple clocking scheme for low-power RTL design
Authors:
Papachristou, CA Nourani, M Spining, M
Citation:
Ca. Papachristou et al., A multiple clocking scheme for low-power RTL design, IEEE VLSI, 7(2), 1999, pp. 266-276
Structural fault testing of embedded cores using pipelining
Authors:
Nourani, M Papachristou, CA
Citation:
M. Nourani et Ca. Papachristou, Structural fault testing of embedded cores using pipelining, J ELEC TEST, 15(1-2), 1999, pp. 129-144
Testability enhancement for control-flow intensive behaviors
Authors:
Ockunzzi, KA Papachristou, CA
Citation:
Ka. Ockunzzi et Ca. Papachristou, Testability enhancement for control-flow intensive behaviors, J ELEC TEST, 13(3), 1998, pp. 239-257
High-level test synthesis for behavioral and structural designs
Authors:
Papachristou, CA Baklashov, M Lai, K
Citation:
Ca. Papachristou et al., High-level test synthesis for behavioral and structural designs, J ELEC TEST, 13(2), 1998, pp. 167-188
Risultati:
1-4
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