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RAMBAUD MM
HAM TE
STEVIE FA
KAHORA PM
ZANESKI G
THOMA MJ
BOULIN DM
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Authors:
KIZILYALLI IC
THOMA MJ
LYTLE SA
MARTIN EP
SINGH R
VITKAVAGE SC
BECHTOLD PF
KEARNEY JW
RAMBAUD MM
TWIFORD MS
COCHRAN WT
FENSTERMAKER LR
FREYMAN R
SUN WS
DUNCAN A
Citation: Ic. Kizilyalli et al., HIGH-PERFORMANCE 3.3- AND 5-V 0.5-MU-M CMOS TECHNOLOGY FOR ASICS, IEEE transactions on semiconductor manufacturing, 8(4), 1995, pp. 440-448
Authors:
KIZILYALLI IC
RAMBAUD MM
DUNCAN A
LYTLE SA
THOMA MJ
Citation: Ic. Kizilyalli et al., THRESHOLD VOLTAGE MINIMUM GATE LENGTH TRADE-OFF IN BURIED-CHANNEL PMOS DEVICES FOR SCALED SUPPLY VOLTAGE CMOS TECHNOLOGIES, IEEE electron device letters, 16(10), 1995, pp. 457-459