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Results: 4

Authors: SINITSKY D TANG S JANGITY A ASSADERAGHI F SHAHIDI G HU CM
Citation: D. Sinitsky et al., SIMULATION OF SOI DEVICES AND CIRCUITS USING BSIM3SOI, IEEE electron device letters, 19(9), 1998, pp. 323-325

Authors: VOLDMAN S ASSADERAGHI F MANDELMAN J HSU L SHAHIDI G
Citation: S. Voldman et al., DYNAMIC THRESHOLD BODY-COUPLED AND GATE-COUPLED SOI ESD PROTECTION NETWORKS, Journal of electrostatics, 44(3-4), 1998, pp. 239-255

Authors: VOLDMAN S SCHULZ R HOWARD J GROSS V WU S YAPSIR A SADANA D HOVEL H WALKER J ASSADERAGHI F CHEN B SUN JYC SHAHIDI G
Citation: S. Voldman et al., CMOS-ON-SOI ESD PROTECTION NETWORKS, Journal of electrostatics, 42(4), 1998, pp. 333-350

Authors: KOBURGER CW CLARK WF ADKISSON JW ADLER E BAKEMAN PE BERGENDAHL AS BOTULA AB CHANG W DAVARI B GIVENS JH HANSEN HH HOLMES SJ HORAK DV LAM CH LASKY JB LUCE SE MANN RW MILES GL NAKOS JS NOWAK EJ SHAHIDI G TAUR Y WHITE FR WORDEMAN MR
Citation: Cw. Koburger et al., A HALF-MICRON CMOS LOGIC GENERATION, IBM journal of research and development, 39(1-2), 1995, pp. 215-227
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