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Results: 1-6 |
Results: 6

Authors: Qi, XN Yue, CP Arnborg, T Soh, HT Sakai, H Yu, ZP Dutton, RW
Citation: Xn. Qi et al., A fast 3-D modeling approach to electrical parameters extraction of bonding wires for RF circuits, IEEE T AD P, 23(3), 2000, pp. 480-488

Authors: Chow, EM Soh, HT Lee, HC Adams, JD Minne, SC Yaralioglu, G Atalar, A Quate, CF Kenny, TW
Citation: Em. Chow et al., Integration of through-wafer interconnects with a two-dimensional cantilever array, SENS ACTU-A, 83(1-3), 2000, pp. 118-123

Authors: Soh, HT Yue, CP McCarthy, A Ryu, C Lee, TH Wong, SS Quate, CF
Citation: Ht. Soh et al., Ultra-low resistance, through-wafer via (TWV) technology and its applications in three dimensional structures on silicon, JPN J A P 1, 38(4B), 1999, pp. 2393-2396

Authors: Kong, J Zhou, C Morpurgo, A Soh, HT Quate, CF Marcus, C Dai, H
Citation: J. Kong et al., Synthesis, integration, and electrical properties of individual single-walled carbon nanotubes, APPL PHYS A, 69(3), 1999, pp. 305-308

Authors: Wilder, K Soh, HT Atalar, A Quate, CF
Citation: K. Wilder et al., Nanometer-scale patterning and individual current-controlled lithography using multiple scanning probes, REV SCI INS, 70(6), 1999, pp. 2822-2827

Authors: Soh, HT Quate, CF Morpurgo, AF Marcus, CM Kong, J Dai, HJ
Citation: Ht. Soh et al., Integrated nanotube circuits: Controlled growth and ohmic contacting of single-walled carbon nanotubes, APPL PHYS L, 75(5), 1999, pp. 627-629
Risultati: 1-6 |