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Results:
1-4
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Results: 4
Sub-500-ps 64-b ALUs in 0.18-mu m SOI/Bulk CMOS: Design and scaling trends
Authors:
Mathew, SK Krishnamurthy, RK Anders, MA Rios, R Mistry, KR Soumyanath, K
Citation:
Sk. Mathew et al., Sub-500-ps 64-b ALUs in 0.18-mu m SOI/Bulk CMOS: Design and scaling trends, IEEE J SOLI, 36(11), 2001, pp. 1636-1646
An analog scheme for fixed-point computation - Part II: Applications
Authors:
Soumyanath, K Borkar, VS
Citation:
K. Soumyanath et Vs. Borkar, An analog scheme for fixed-point computation - Part II: Applications, IEEE CIRC-I, 46(4), 1999, pp. 442-451
RF integration into CMOS and deep-submicron challenges
Authors:
Svensson, C Soumyanath, K Kaiser, B Vasudev, PK Carley, LR Kalter, H Ackland, B
Citation:
C. Svensson et al., RF integration into CMOS and deep-submicron challenges, IEEE DES T, 16(3), 1999, pp. 112-116
Accurate on-chip interconnect evaluation: A time-domain technique
Authors:
Soumyanath, K Borkar, S Zhou, CY Bloechel, BA
Citation:
K. Soumyanath et al., Accurate on-chip interconnect evaluation: A time-domain technique, IEEE J SOLI, 34(5), 1999, pp. 623-631
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